Principal ASIC Design Verification Engineer - Terawave Verified today

About TeraWave

Blue Origin is developing TeraWave, a revolutionary satellite communications network delivering symmetrical data speeds up to 6 Tbps anywhere on Earth. This multi-orbit constellation of optically interconnected satellites in LEO and MEO will provide enterprise-grade connectivity worldwide.

The Role

You will serve as a technical authority for verification of advanced ASICs enabling next-generation satellite communication systems. You will set verification strategy across one or more silicon programs and ensure robust methodologies for functionally complex, high-performance communication hardware.

Responsibilities

• Define end-to-end verification strategy for large satellite communication ASIC or SoC programs
• Establish verification methodologies, infrastructure, and signoff criteria across block, subsystem, and SoC levels
• Lead verification planning for complex communication functions such as modem pipelines, FEC engines, digital beamforming, packet processing, and control fabrics
• Drive alignment among design, architecture, systems, firmware, and validation teams
• Evaluate verification completeness through coverage, assertions, formal analysis, emulation, and silicon correlation
• Resolve critical technical issues and direct root-cause analysis for complex functional failures
• Guide development of reusable VIP, reference models, and regression automation frameworks
• Mentor technical leaders and raise overall verification maturity of the organization
• Influence future verification roadmap, tool strategy, and reuse models

Minimum Qualifications

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field
• 12+ years of ASIC/SoC verification experience
• Expert-level knowledge of System Verilog, UVM, assertions, and verification signoff methodology
• Proven success leading verification for complex chips or multiple tape-outs
• Strong understanding of communication signal-processing hardware and system-level integration
• Excellent technical leadership and cross-organizational communication skills

Preferred Qualifications

• Deep expertise in space-based communications, digital modems, phased-array processing, or payload processing
• Experience with formal property verification, emulation, and performance validation
• Familiarity with fault tolerance, mission-critical reliability, or radiation-aware verification considerations
• Experience with architectural modeling and verification planning for hardware/software partitioned systems
• Strong record of technical innovation and process improvement

Compensation and Benefits

Base pay range: $269,175-$376,843.95 (CA and WA applicants; other site ranges may differ).

Benefits include medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with company match up to 5%, and Education Support Program. Stock options available for regular employees working at least 20 hours/week. Paid time off up to 4 weeks per year based on scheduled hours, plus up to 14 company-paid holidays. Bonus eligibility dependent on role type and job level.

Employment Requirements

Applicants must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Standard background check required for all positions.