Principal RFIC Design Engineer - TeraWave Verified today
About TeraWave
Blue Origin is pioneering space-based communications with TeraWave, a multi-orbit satellite constellation delivering symmetrical data speeds up to 6 Tbps globally. The network uses optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO) to provide enterprise-grade connectivity.
The Role
You will join the Silicon Systems organization within the TeraWave team. This is a principal-level position in a critical technical area as we bring together technology across Blue Origin's product lines to build the future of space-based communication.
Key Responsibilities
- Design and develop RFICs and mixed-signal ASICs using Cadence Virtuoso, Spectre RF and similar tools
- Develop analog models and verification methodologies for ASIC verification and requirements validation
- Create and execute test plans for pre- and post-silicon processes
- Conduct tradeoff analysis for noise, linearity, power, mismatch and other analog impairments
- Collaborate with cross-functional teams including systems, firmware, architecture, and product engineering
- Support lab integration and troubleshooting activities
- Resolve design and layout issues, driving solutions for interface timing, congestion, and implementation challenges
- Adopt AI-based methodology throughout the design cycle, from design and simulation to verification, characterization and manufacturing
Required Qualifications
- 10+ years of industry experience in RFIC design and development, or equivalent combination of industry experience and research from a PhD program
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical discipline
- Experience with RF and mixed-signal block design
- Experience with Linux development environment
- Direct tape-out experience with RF or deep sub-micron analog mixed-signal chips
Preferred Qualifications
- Advanced degree (MS/PhD) in Electrical Engineering, Computer Engineering, or related field
- Experience in full RF CMOS ASIC lifecycle: architecture, design, simulation, verification, validation, integration and test
- Experience with Software-Defined Radio architectures, ADC/DAC, and DSPs
- Knowledge of DSP and communications systems including spread spectrum, forward error correction, and modulation types (OFDM, QPSK, QAM, PCM/FM, PAM)
- Experience mentoring junior engineers
Location and Work Arrangement
This role is onsite in one of four locations: Bay Area CA, San Diego CA, Austin TX, or Kent WA. Currently approved for temporary remote work exception while specific sites are being developed.
Compensation
Base pay range for CA and WA applicants: $213,331.00 to $298,663.05 annually. Other site ranges may differ.
Employment Requirements
Applicants must be a U.S. citizen or national, U.S. permanent resident (Green Card holder), or lawfully admitted as a refugee or granted asylum. Blue's Standard Background Check is required for all positions.
Benefits
- Medical, dental, vision, basic and supplemental life insurance
- Paid parental leave
- Short and long-term disability
- 401(k) with company match up to 5%
- Education Support Program
- Stock options for all regular employees working at least 20 hours per week
- Up to four weeks paid time off per year and up to 14 company-paid holidays
- Performance-based bonuses and additional benefits based on role type and job level