SLD Avionics FPGA Engineer III - Lunar Permanence Verified today

Blue Origin · 2 Locations · Electronics · first seen 2026-09-03

About the role

You are part of the Lunar Permanence business unit, developing Blue Moon landers and related products for sustainable lunar transport. You will develop, implement, verify, and test HDL for FPGA-based designs that operate in harsh space environments aboard avionics components in various spaceflight systems.

You will work directly with NASA and National Team Partners as part of the Human Landing System (HLS) Sustaining Lunar Development (SLD) program.

Your responsibilities

  • Develop HDL requirements in coordination with systems engineering, hardware engineering, software engineering, and subsystem owners
  • Design and verify FPGA implementations using hardware description languages
  • Develop tests and associated documentation
  • Debug failures in simulation to identify root causes
  • Participate in design reviews
  • Travel up to 10% to other Blue Origin locations for meetings and company events

Minimum qualifications

  • Bachelor's or Master's degree in computer engineering, electrical engineering, computer science, mathematics, physics, aerospace, or related field
  • 5+ years of FPGA/ASIC design and verification experience
  • Proficient in writing RTL using Verilog, SystemVerilog, or VHDL (SystemVerilog preferred)
  • Strong understanding of FPGA design concepts: CDC, constraint definition, STA, and timing closure
  • Proficient with FPGA development tools such as Xilinx Vivado, Intel Quartus, Lattice Diamond/Radiant, or Microchip Libero
  • Proficient with ModelSim, QuestaSim, or equivalent simulators
  • Proficient in writing testbenches using UVM/OVM, SystemVerilog Assertions, and/or functional/code coverage analysis
  • Ability to work effectively in a team environment and communicate technical information clearly
  • Must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum

Preferred qualifications

  • 8+ years of FPGA/ASIC development experience
  • Proficient with scripting languages like Perl, Python, or Tcl
  • Proficient with revision control systems such as Git or SVN
  • Experience with on-chip bus protocols such as AMBA (AXI, AHB, APB)
  • Experience with IEEE 802.3, XAUI, JESD204, I2C, or SPI interfaces
  • Working knowledge of NPR 7150.2, DO-254, or other safety-critical software standards

Compensation

Base pay range:

  • Colorado applicants: $119,814.00 to $167,738.55
  • Washington applicants: $130,706.00 to $182,987.70
  • Other site ranges may differ

Benefits

  • Medical, dental, vision insurance
  • Basic and supplemental life insurance
  • Paid parental leave
  • Short and long-term disability
  • 401(k) with company match up to 5%
  • Education Support Program
  • Stock options for regular employees (20+ hours/week)
  • Paid time off: up to 4 weeks per year and up to 14 company-paid holidays
  • Performance bonuses (amounts and eligibility not guaranteed; subject to change)

Background and clearance

Required background check: Blue's Standard Background Check. Additional checks may apply depending on role requirements (DBIDS for military installations, commercial driver requirements, or Merchant Mariner Credential).