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SLD FPGA Verification Engineer III - Lunar Permanence Verified today

Blue Origin · 2 Locations · Electronics · first seen 2026-09-03
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About the Role

You will participate in verification of FPGA-based solutions within the Sustaining Lunar Development program's avionics, guidance, and navigation group. This includes requirements development with design engineers, verification through formal methods, UVM-based simulation, and on-target testing. You will work on high-reliability, safety-critical avionics for the Human Landing System (HLS) vehicle as part of the Lunar Permanence business unit, which develops Blue Origin's Blue Moon landers.

Key Responsibilities

  • Perform requirements-based verification of FPGAs using Universal Verification Methodology (UVM).
  • Create comprehensive verification and validation plans that encompass functional and system-level verification and validation.
  • Develop IP, subsystem, and system-level testbenches and tests to achieve required coverage goals.
  • Write directed and random test cases.
  • Document plans and procedures.
  • Generate reports in support of certification to a high Design Assurance Level (DAL).

Required Qualifications

  • BS or MS in Electrical Engineering, Computer Engineering, or closely related field.
  • 5 or more years' experience verifying FPGAs or ASICs.
  • In-depth experience with RTL simulation tools such as Siemens QuestaSim, ModelSim, or equivalent.
  • In-depth knowledge of SystemVerilog and Universal Verification Methodology (UVM).
  • Expertise developing testbench environments and verification components (Monitor, Scoreboard, Driver, Agent) from scratch.
  • Understanding of different types of coverage, cover classes, and cover points.
  • Experience with predictive testbench components, functional coverage, and assertions.
  • Experience with constrained random verification.
  • Experience with the Register Abstraction Layer.
  • Ability to develop detailed test plans, write tests, run regressions, collect coverage matrices, and report progress to the program.
  • Experience reviewing verification and validation results against coverage goals.
  • Experience writing, analyzing, and achieving coverage metrics.
  • Debugging skills to isolate issues between RTL design and testbench or test case.

Desired Qualifications

  • Familiarity with AXI protocols, PCIe, Ethernet, SPI, or I2C interfaces.
  • Experience debugging FPGA/ASIC hardware and assisting with HW/SW integration.
  • Experience managing regression and continuous integration infrastructure within GitLab.
  • Knowledge of scripting languages such as Python, Perl, TCL, or Shell for automation.
  • Working knowledge of NPR 7150.2, DO-254, or other safety-critical software standards.

Compensation

Base pay range for Washington applicants: $130,706.00 to $182,987.70. Other site ranges may differ.

Employment Requirements

Applicants must be a U.S. citizen or national, U.S. permanent resident (Green Card holder), or lawfully admitted to the U.S. as a refugee or granted asylum.

Benefits

  • Medical, dental, and vision insurance.
  • Basic and supplemental life insurance.
  • Paid parental leave.
  • Short and long-term disability.
  • 401(k) with company match up to 5%.
  • Education Support Program.
  • Stock options for all regular employees working at least 20 hours per week.
  • Paid time off up to four weeks per year and up to 14 company-paid holidays, depending on scheduled hours.
  • Performance-based bonuses and other benefits based on role type and job level (subject to change).