Principal ASIC Package Design Engineer Verified today

The Role

Lead advanced ASIC package architecture and execution, with focus on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions. You will operate as the technical authority for package design, defining standards, influencing silicon and system architecture, and ensuring first-pass success for complex, high-speed, power-dense ASICs.

Responsibilities

• Own ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints.
• Lead package-level trade studies across cost, performance, power integrity (PI), signal integrity (SI), thermal, manufacturability, and reliability.
• Define long-term packaging roadmap aligned with future ASIC nodes, bandwidth scaling, and multi-die integration.
• Establish organizational package design standards, methodologies, and best practices.
• Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content.
• Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning.
• Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces.
• Own package-level SI/PI strategy, including high-speed digital interfaces (SerDes, JESD, Interlaken), power delivery network (PDN) design, and decoupling strategy.
• Lead thermal architecture at the package level, including lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling.
• Manage relationships with external packaging vendors, substrate suppliers, and OSATs, including vendor qualification, capability assessment, contract negotiation, and performance/quality scorecard to ensure roadmap and volume commitments are met.
• Drive material selection, substrate technology choices, and assembly process optimization.

Required Qualifications

• Bachelor's degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or a related field.
• 10+ years of experience in ASIC package design, with deep expertise in FC-BGA.
• Proven experience delivering high-pin-count, high-performance ASIC packages into production.
• Strong understanding of substrate technologies and materials, SI/PI fundamentals at the package level, and thermal management for power-dense ASICs.
• Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, and ADS.
• Experience working directly with OSATs and substrate vendors.
• Knowledge of packaging qualification and test methodologies.

Preferred Qualifications

• Experience with MCM or heterogeneous integration (chiplets, interposers, advanced laminates).
• Background in high-speed digital or mixed-signal SoCs.
• Familiarity with aerospace, space, or high-reliability electronics.
• Experience defining packaging strategy from early architecture through first silicon and volume ramp.
• Demonstrated history of building or scaling package design methodology within an organization.

Compensation

• Base salary range: $200,000 - $280,000 plus equity
• Comprehensive benefits including paid time off, medical/dental/vision coverage, life insurance, and paid parental leave.

Export Compliance

This role requires access to ITAR-controlled information. You must be a U.S. person as defined by 22 C.F.R. § 120.15 (U.S. citizen, lawful permanent resident, or protected individual) or eligible for a federally issued export control license.