Senior FPGA RF Signal Processing Engineer Verified today
About the role
Muon Space seeks a Senior FPGA Engineer with RF DSP expertise to join our High Performance Compute team. You will implement HDL for digital signal processing of RF systems on FPGAs, design and optimize these algorithms, and work at the intersection of RF theory, DSP algorithm development, software-defined radio (SDR), and high-performance digital FPGA design.
Responsibilities
- Implement and optimize DSP algorithms on FPGAs for real-time execution; support algorithm prototyping in Python and porting to ARM SoCs
- Design, simulate, and implement DSP algorithms for RF applications (Communications, ESM, Radar, etc.)
- Collaborate with RF hardware engineers on instrument bring-up, calibration routines, and system integration
- Author technical documentation, design specifications, and test reports
Qualifications
- BS/MS in Electrical Engineering, Computer Engineering, or related field
- 5+ years of professional experience in FPGA development of RF DSP and translating prototype algorithms into FPGA implementations
- Experience with RF digital signal processing techniques: spectrum monitoring, signal intelligence, modulation/demodulation, filtering, channel estimation, equalization, synchronization, AGC, DPD
- Profound expertise in HDL (Verilog, System Verilog, VHDL) and FPGA system architecture and design flows
- Ability to work with distributed, interdisciplinary teams
- Familiarity with modern software development tooling and best practices
- Ability to obtain and maintain a security clearance
Preferred Qualifications
- Experience in systems analysis, troubleshooting and design with understanding of hardware-software interplay
- Familiarity with Xilinx/AMD RFSoC or MPSoC
- Proficiency in C/C++ or Rust for embedded/real-time systems
- Python-based development and analysis
- FPGA-based DSP techniques: DPD, beamforming, MIMO, radar signal processing
- Communications knowledge: modulation schemes (QAM, OFDM, FSK), channel coding, multirate signal processing, adaptive filtering
- RF concepts: mixers, PLLs, ADCs/DACs, IQ imbalance, frequency planning, link budgets
- Calibration algorithms: DC offset, IQ correction, LO leakage
- Experience on space-based applications
- CI/CD pipelines for embedded firmware
- Version control (Git), debugging tools (JTAG, GDB), and lab instrumentation
Compensation
Salary range: $158,000 - $223,000, plus competitive equity grant and comprehensive benefits. Final compensation based on skills, qualifications, experience, and geographic location.
Employment
This role is remote eligible. Full-time employees receive equity compensation, medical/dental/vision insurance, 401k, disability and life insurance, three weeks paid vacation, 12 paid holidays, unlimited sick time, and paid parental leave.
Requirements
This position requires access to export-controlled information. Applicants must be a U.S. person (U.S. citizen or national, lawful permanent resident, refugee, or asylee), eligible to access export-controlled information without authorization, or eligible and reasonably likely to obtain required export authorization.